In some applications of power amplifiers, it is desired to provide a fixed envelope. For example, some cellular standards, such as GSM/DCS, require a fixed envelope. FIG. 1 shows a typical prior art implementation of a class E power amplifier design, which provides an output having a fixed envelope. FIG. 1 shows a power amplifier 10, which amplifies an RF input signal (RF IN) to provide an output signal to an antenna 16. The power amplifier 10 includes a predriver circuit 12 connected between the input signal RF IN and a switching device Q1, which operates essentially as a switch. The switching device Q1 is connected to inductor L1, capacitor C1, and transformation network 14. A voltage source VBAT is provided by a battery. To achieve high efficiency, the transformation network 14, inductor L1, and capacitor C1 are tuned to provide the waveform (at node VD) shown in FIG. 2. FIG. 2 is plot of the voltage at node VD versus time. In FIG. 2, the peak voltage of the waveform shown will be approximately 3 to 4 times the supply voltage VBAT.
Currently, typical cellular phone batteries provide a voltage in the range of 3.0 to 3.5 volts, which is based on the voltage of a Li-Ion cell or 3 Ni-Cad cells. At a supply voltage VBAT of 3.5 volts, the peak voltage in a class E power amplifier (e.g., the voltage at node VD in FIG. 1) will be approximately 10.5 to 14.0 volts. The requirement for a high voltage and a high cut-off frequency fT means that exotic technology devices, such as GaAs bipolars, FETs, LDMOS FETs, or SiGe bipolars could be used to meet these requirements. The requirements mentioned above, pose a large problem when attempting to integrate a power amplifier in CMOS, since CMOS transistors capable of running at GHz frequencies have maximum peak voltages of less than 5 volts.